1. Field of the Invention
The present invention relates to a variable gain amplification circuit and, more particularly, to a variable gain amplification circuit which amplifies an input signal by a desired gain and outputs the amplified input signal.
2. Description of the Related Art
FIG. 1 shows a circuit diagram of a conventional variable gain amplification circuit.
The conventional variable gain amplification circuit 1 shown in FIG. 1 comprises an input amplification circuit 3, a variable amplification circuit 4 and an output amplification circuit 5. The input amplification circuit 3 amplifies an input signal supplied by an input signal source 2 via an input resistor Ri. The variable amplification circuit 4 amplifies the amplified input signal from the input amplification circuit 3 by a desired gain. The output amplification circuit 5 amplifies the amplified signal from the variable amplification circuit 4, and outputs the amplified signal.
The input amplification circuit 3 comprises an operational amplifier 31, a constant current source 32 and a transistor Q1. The input signal is input to an inversion input terminal of the operational amplifier 31 and a center voltage of the input signal is input to a non-inversion input terminal of the operational amplifier 31 so that a difference is output to a base of the transistor Q1.
The transistor Q1 comprises a PNP transistor. A constant current is provided to an emitter of the transistor Q1 from the constant current source 32. A collector of the transistor Q1 is connected to the variable amplification circuit 4. A junction between the constant current source 32 and the transistor Q1 is connected to the inversion input terminal of the operational amplifier 31.
The variable amplification circuit 4 comprises NPN transistors Q11 through Q18, constant current sources 41 and 42 and a variable voltage source 43. The variable amplification circuit 4 amplifies the input signal provided from the input amplification circuit 3 by a gain corresponding to a voltage provided by the variable voltage source 43, and supplies the amplified input signal to the output amplification circuit 5.
The output amplification circuit 5 comprises an operational amplifier 51 and an output resistor Ro. The output of the variable amplification circuit 4 is provided to an inversion input terminal of the available amplification circuit 4, and a center voltage of the output signal is input to a non-inversion input terminal of the variable amplification circuit 4. The output amplification circuit 5 outputs a signal obtained by inverting and amplifying the signal supplied by the variable amplification circuit 4.
FIG. 2 shows a graph for explaining an operation of the conventional variable gain amplification circuit 1.
In the conventional variable gain amplification circuit 1, an output current of the input amplification circuit 3 is provided to an input of the output amplification circuit 5 via transistors Q11 and Q12 which form a current mirror circuit and a transistor Q14. When an amplitude of the input signal is at the maximum, a constant current I1 output from the constant current source 32 is provided to the input of the output amplification circuit 5. Accordingly, the maximum output voltage of the output amplification circuit 5 is a product of a value of the output resistor Ro and a value of the output current I1. That is, the maximum output voltage Vmax is determined by the following relationship. EQU Vmax=Ro.times.I1
Accordingly, in the variable amplification circuit 4, the maximum output voltage Vmax is determined by the current I1. Additionally, a sum of the current I1 and currents flowing in the transistors Q14 and Q16 is supplied to the output resistor Ro when the amplitude is at a maximum. Thus, a sum of the currents flowing in the transistors Q14 and Q16 flows to the output resistor Ro as an error, which results in generation of an offset voltage.
However, in order to increase an output dynamic range of the conventional variable gain amplification circuit 1, either the value of the current I1 or the resistance of the output resistor Ro must be increased. Accordingly, there is a problem in that the offset voltage is increased and a distortion is generated in the signal when either the value of the current I1 or the resistance of the resistor Ro is increased.